Topic hub · CPU and systems

CPU and systems investigations

CPU and systems investigations on microarchitecture, SIMD, concurrency, memory, Linux I/O, containers and performance measurement.

About this collection

Systems claims become useful only when the level of explanation is clear. A throughput result may come from execution width, shared core resources, memory behavior, an operating-system cache or simply a benchmark that exercised a different path. This hub gathers investigations that keep those boundaries visible across CPU microarchitecture, SIMD, concurrency, storage I/O and container runtimes.

The curated path starts with modern core sharing and vector execution, then moves outward toward Linux I/O and transactional memory. The chronological list includes embedded processors, Ruby process models, text compression and zero-allocation servers because software structure often reveals the hardware contract more clearly than a specification table. These notes are intended for comparison and diagnosis: clock speed alone is rarely enough, a completed benchmark is not automatically representative, and a result from one kernel, compiler or SoC should not be promoted into a universal rule without new evidence.

Start here

  1. Inside Apple M4’s SME engine A technical review of Apple M4’s SME implementation, its shared cluster-level throughput, ZA pipeline behavior, precision limits, and software implications.
  2. SMT, Spatial Multithreading, and the battle for a CPU core How classic SMT, NVIDIA Spatial Multithreading, many-way server SMT, and non-SMT CPUs trade throughput against latency, isolation, and power.
  3. SVE, AVX-512, and vector-length agnostic code A Ruby-readable explanation of how Arm SVE's predicate-driven model differs from fixed-width SIMD such as AVX-512, with practical cautions about Apple M1.
  4. RWF_UNCACHED and buffered I/O without page-cache pollution A short explanation of Jens Axboe's RWF_UNCACHED patch set: what it tries to solve, how it differs from direct I/O, and why it matters for fast storage.
  5. Transactional memory after the hype Notes on hardware transactional memory, Intel TSX, software transactional memory, Clojure STM, and why transactional memory survived in narrower forms.

All investigations

  1. Inside Apple M4’s SME engine
  2. SMT, Spatial Multithreading, and the battle for a CPU core
  3. From A14 to M5: Apple’s wide cores and the x86 single-thread race
  4. How a game crash left 8 GB wired in the Apple GPU stack
  5. Using caffeinate on an unplugged Mac
  6. Making macOS Tahoe faster, without snake oil
  7. Days Gone hordes, machine guns, and polite cheating
  8. Transactional memory after the hype
  9. Neural text compression: prediction, range coding, and deterministic decoding
  10. Apple Silicon GPU memory limits and wired RAM
  11. Zero-allocation HTTP servers in Ruby terms
  12. ESP32, Xtensa, ARM, and the Pentium MMX comparison
  13. SVE, AVX-512, and vector-length agnostic code
  14. Docker on WSL2, NixOS, and runtime boundaries
  15. Deploying multiple Rails apps on one VM with Capistrano
  16. RWF_UNCACHED and buffered I/O without page-cache pollution
  17. SSE, proxy buffering, and long-polling fallbacks
  18. SIMD string processing in a Ruby C extension
  19. Ruby Fibers and cooperative concurrency
  20. Kafka, PostgreSQL, and consistency boundaries
  21. dRuby, Unix pipes, and forked worker pools

Other hubs